Time-Interleaved Continuous-Time Delta-Sigma Modulators
نویسندگان
چکیده
ABSTRACT In this thesis, a method of time-interleaving continuous-time delta-sigma modulators is investigated. The derivation of the modulator starting from a discrete-time timeinterleaved structure is presented. With various simplifications, the resulting modulator has only a single-path of integrators, making it robust to DC offsets. A third-order lowpass continuous-time time-interleaved delta-sigma modulator with an oversampling ratio of 5 is designed in a m μ 18 . 0 CMOS technology with a V 8 . 1 supply voltage. Experimental results show that an SNDR of dB 57 and a dynamic range of dB 60 are obtained with a sampling frequency of MHz 100 . With a sampling frequency of MHz 200 , an SNDR of dB 49 with a dynamic range of dB 55 is achieved. The power consumption is mW 101 at MHz 100 , and mW 103 at MHz 200 .
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